{"id":4363,"date":"2024-05-07T17:29:03","date_gmt":"2024-05-07T14:29:03","guid":{"rendered":"https:\/\/staging.speed.pub.ro\/?page_id=4363"},"modified":"2024-05-07T17:55:14","modified_gmt":"2024-05-07T14:55:14","slug":"microprocessor-applications-for-real-time-systems","status":"publish","type":"page","link":"https:\/\/staging.speed.pub.ro\/speed3\/academic\/microprocessor-applications-for-real-time-systems\/","title":{"rendered":"Microprocessor Applications for Real Time Systems"},"content":{"rendered":"

Course in Electric Vehicle Propulsion and Control (EPIC) Master’s program (2nd year)<\/p>\n

Teachers<\/h3>\n

Lect. Georgian Nicolae<\/strong><\/a><\/p>\n

Course Description<\/h3>\n

Study of the basic concepts in CISC and RISC general microprocessor architecture: registers, memory management, addressing techniques, data transfer, instruction set, input\/output strategies. The students should have the possibility to approach any specific microprocessor architecture, either general or dedicated. In the laboratory-type applications, the students are guided in developing applications for the 8086 microprocessor using the emu8086 simulator.<\/p>\n

Contents<\/h3>\n

Course<\/strong><\/p>\n

    \n
  • \u201cMicrocomputer Structure. Defintions\u201d<\/li>\n
  • \u201cOverview of a CISC, General Purpose Microprocessor Core\u201d<\/li>\n
  • \u201cFundamentals of a Typical CISC Architecture\u201d<\/li>\n
  • \u201cFundamentals of a Typical RISC Architecture\u201d<\/li>\n
  • \u201cInput\/Output Strategies\u201d<\/li>\n
  • \u201cTime-Dimension of a General Purpose Microprocessor Architecture\u201d<\/li>\n
  • \u201cAn Overview of Intel x86 Architecture (IA-32) in Real Mode\u201d<\/li>\n<\/ul>\n

    Laboratory<\/strong><\/p>\n

      \n
    • Introducing a development environment for x86 microprocessors: emu8086<\/li>\n
    • Data transfer instructions and array operations for x86 microprocessors in real mode<\/li>\n
    • Data processing instructions for x86 microprocessors in real mode<\/li>\n
    • Program control instructions for x86 microprocessors in real mode<\/li>\n
    • Interrupts for x86 microprocessors in real mode<\/li>\n
    • Translation of instructions from high-level programming into assembly<\/li>\n
    • Laboratory assessment<\/li>\n<\/ul>\n

      Grading<\/h3>\n

      Laboratory evaluation: 20%
      \nProject evaluation: 40%
      \nCourse final exam (written): 40%<\/p>\n","protected":false},"excerpt":{"rendered":"

      Course in Electric Vehicle Propulsion and Control (EPIC) Master’s program (2nd year) Teachers Lect. Georgian Nicolae Course Description Study of the basic concepts in CISC and RISC general microprocessor architecture: registers, memory management, addressing techniques, data transfer, instruction set, input\/output strategies. The students should have the possibility to approach any specific microprocessor architecture, either general<\/p>\n","protected":false},"author":37,"featured_media":0,"parent":14,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-4363","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/pages\/4363","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/users\/37"}],"replies":[{"embeddable":true,"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/comments?post=4363"}],"version-history":[{"count":6,"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/pages\/4363\/revisions"}],"predecessor-version":[{"id":4382,"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/pages\/4363\/revisions\/4382"}],"up":[{"embeddable":true,"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/pages\/14"}],"wp:attachment":[{"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/media?parent=4363"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}