Course in Bachelor’s program (2nd year, series A, B, F, and G)<\/p>\n
Prof. Corneliu Burileanu<\/strong><\/a> Introducing several typical microcontroller architectures: 8051 core, \u201cArduino\u201d Systems and ARM family. Study of the advanced principles in CISC and RISC microprocessor architecture: memory management, protected mode, multitasking, CISC and RISC architecture convergence in actual processors. In the laboratory-type applications, the students are guided in developing practical applications for the C8051F040 microcontroller.<\/p>\n Course<\/strong><\/p>\n Laboratory<\/strong><\/p>\n Additional resources<\/strong><\/p>\n C8051F04x MCUs 8-bit<\/strong><\/a> Laboratory evaluation (multiple verification tests + optional oral evaluation): 50% Course in Bachelor’s program (2nd year, series A, B, F, and G) Teachers Prof. Corneliu Burileanu Assoc. Prof. Horia Cucu Lect. Ana Neac\u0219u Lect. Georgian Nicolae As. Andrei D\u0103escu Lect. George-Vl\u0103du\u021b Popescu Course Description Introducing several typical microcontroller architectures: 8051 core, \u201cArduino\u201d Systems and ARM family. Study of the advanced principles in CISC and RISC<\/p>\n","protected":false},"author":2,"featured_media":0,"parent":14,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-311","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/pages\/311","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/comments?post=311"}],"version-history":[{"count":57,"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/pages\/311\/revisions"}],"predecessor-version":[{"id":4862,"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/pages\/311\/revisions\/4862"}],"up":[{"embeddable":true,"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/pages\/14"}],"wp:attachment":[{"href":"https:\/\/staging.speed.pub.ro\/speed3\/wp-json\/wp\/v2\/media?parent=311"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}
\nAssoc. Prof. Horia Cucu<\/a><\/strong>
\nLect. Ana Neac\u0219u<\/a>
\nLect. Georgian Nicolae<\/a>
\nAs. Andrei D\u0103escu<\/a>
\nLect. George-Vl\u0103du\u021b Popescu<\/a><\/strong><\/p>\nCourse Description<\/h3>\n
Contents<\/h3>\n
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\nSilicon Laboratories IDE<\/a><\/strong><\/p>\nGrading<\/h3>\n
\nCourse final exam (verification quiz + optional written and oral evaluation): 50%<\/p>\n","protected":false},"excerpt":{"rendered":"